Last night I was reading a data sheet about the ICH10 I/O Controller Hub (Section 13.7.5) and got a little more insight on the workings of the Reset Control Register (port 0xcf9).
Bits 1 and 3 determine the type of reset being requested and bit 2 initiates the reset. When bit 2 (SYS_RST) transitions from 0 to 1 a reset is initiated as determined by the policy of bits 1 and 3.
Bit 1, System Reset (SYS_RST) determines a soft reset (0) or hard reset (1).
Bit 3, Full Reset (FULL_RST) if set to 1 causes a full power cycle.
On some systems, the ACPI FACP RESET_REG and RESET_VALUE are set 0xcf9 and 0x06 respectively which essentially triggers a hard system reset when doing a reboot using the reboot=acpi kernel option.
The kernel also has a reboot=pci option that will force a reset via the Reset Control Register and does this in three stages. First it sets bit 1 (SYS_RST=hard reset), waits 50 microseconds and then transitions SYS_RST from 0 to 1 to initiate the reset.
However, a full system reset can be initiated by also setting bit three by writing 0x0e to port 0xcf9. I’ve noticed that some newer laptops on the market seem to be doing a full system reset on reboot, so I wonder if this is the mechanism they are using nowadays.
The beauty of Linux is that one can string a bunch of commands together to do this from user space:
echo -e ‘\xe’ | sudo dd of=/dev/port bs=1 seek=3321
..so make sure you data is sync’d before hand as this is destructive as power cycling the machine while it’s on.
From Canonical
